From 2fa777e34c1e19705638b4674e548245d27251b4 Mon Sep 17 00:00:00 2001 From: Hanspeter Portner Date: Sun, 2 Mar 2014 11:57:52 +0100 Subject: [PATCH] solder paste clearence for 125um mylar stencils --- Chimaera_DSP-F3_Unit.kicad_pcb | 4 +++- Chimaera_DSP-F3_Unit.pro | 2 +- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/Chimaera_DSP-F3_Unit.kicad_pcb b/Chimaera_DSP-F3_Unit.kicad_pcb index 6ef11dc..2014f4e 100644 --- a/Chimaera_DSP-F3_Unit.kicad_pcb +++ b/Chimaera_DSP-F3_Unit.kicad_pcb @@ -71,12 +71,14 @@ (pad_size 1.5 1.5) (pad_drill 0.9) (pad_to_mask_clearance 0) + (pad_to_paste_clearance -0.0225) + (pad_to_paste_clearance_ratio -0.05) (aux_axis_origin 12 12) (visible_elements FFFFFBBF) (pcbplotparams (layerselection 524288) (usegerberextensions false) - (excludeedgelayer false) + (excludeedgelayer true) (linewidth 0.150000) (plotframeref false) (viasonmask false) diff --git a/Chimaera_DSP-F3_Unit.pro b/Chimaera_DSP-F3_Unit.pro index 6cc451a..879af4a 100644 --- a/Chimaera_DSP-F3_Unit.pro +++ b/Chimaera_DSP-F3_Unit.pro @@ -1,4 +1,4 @@ -update=Don 02 Jan 2014 20:04:19 CET +update=Son 02 Mär 2014 11:42:01 CET version=1 last_client=kicad [cvpcb] -- 2.38.5